This paper presents a new compact controllable impedance multiplier using CMOS technology. The design is based on the use\nof the translinear principle using MOSFETs in subthreshold region.The value of the impedance will be controlled using the bias\ncurrents only.The impedance can be scaled up and down as required.The functionality of the proposed design was confirmed by\nsimulation using BSIM3V3MOSmodel in Tanner Tspice 0.18
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